Solving tri-diagonal linear systems using field programmable gate arrays
Warne, David, Kelson, Neil A., & Hayward, Ross F. (2012) Solving tri-diagonal linear systems using field programmable gate arrays. In 4th International Conference on Computational Methods (ICCM2012), 25-28 November 2012, Crowne Plaza, Gold Coast, QLD.
Abstract
In this paper, we present the outcomes of a project on the exploration of the use of Field Programmable Gate Arrays(FPGAs) as co-processors for scientific computation. We designed a custom circuit for the pipelined solving of multiple tri-diagonal linear systems. The design is well suited for applications that require many independent tri diagonal system solves, such as finite difference methods for solving PDEs or applications utilising cubic spline interpolation. The selected solver algorithm was the Tri Diagonal Matrix Algorithm (TDMA or Thomas Algorithm). Our solver supports user specified precision thought the use of a custom floating point VHDL library supporting addition, subtraction, multiplication and division. The variable precision TDMA solver was tested for correctness in simulation mode. The TDMA pipeline was tested successfully in hardware using a simplified solver model. The details of implementation, the limitations, and future work are also discussed.
Citations:
Citation countsare sourced monthly from Scopus and Web of Science citation databases.
These databases contain citations from different subsets of available publications and different time periods and thus the citation count from each is usually different. Some works are not in either database and no count is displayed. Scopus includes citations from articles published in 1996 onwards, and Web of Science generally from 1980 onwards.
Citations counts from the Google Scholar™ indexing service can be viewed at the linked Google Scholar™ search.
Full-text downloads:
Full-text downloadsdisplays the total number of times this work’s files (e.g., a PDF) have been downloaded from QUT ePrints as well as the number of downloads in the previous 365 days. The count includes downloads for all files if a work has more than one.
| ID Code: | 54894 |
|---|---|
| Item Type: | Conference Paper |
| Keywords: | FPGA, Matrix Factorisation, Hardware Acceleration, Tri-diagonal Matrix Algorithm, Reconfigurable Computing |
| Subjects: | Australian and New Zealand Standard Research Classification > MATHEMATICAL SCIENCES (010000) > NUMERICAL AND COMPUTATIONAL MATHEMATICS (010300) > Numerical Analysis (010301) Australian and New Zealand Standard Research Classification > TECHNOLOGY (100000) > COMPUTER HARDWARE (100600) > Arithmetic and Logic Structures (100601) Australian and New Zealand Standard Research Classification > TECHNOLOGY (100000) > COMPUTER HARDWARE (100600) > Logic Design (100603) |
| Divisions: | Current > QUT Faculties and Divisions > Division of Technology, Information and Learning Support Current > Schools > School of Electrical Engineering & Computer Science Past > QUT Faculties & Divisions > Faculty of Science and Technology Current > Research Centres > High Performance Computing and Research Support |
| Copyright Owner: | Copyright 2012 [please consult the authors] |
| Deposited On: | 20 Nov 2012 11:36 |
| Last Modified: | 26 Feb 2013 19:09 |
Export: EndNote | Dublin Core | BibTeX
Repository Staff Only: item control page