A frequency adaptive single-phase Phase-Locked Loop with harmonic rejection
Sagha, Hossein, Ledwich, Gerard, Ghosh, Arindam, & Nourbakhsh, Ghavameddin (2014) A frequency adaptive single-phase Phase-Locked Loop with harmonic rejection. In Proceedings of 40th Annual Conference of IEEE Industrial Electronics Society (IECON 2014), Sheraton Hotel, Dallas, TX, pp. 1028-1033.
An improved Phase-Locked Loop (PLL) for extracting phase and frequency of the fundamental component of a highly distorted grid voltage is presented. The structure of the single-phase PLL is based on the Synchronous Reference Frame (SRF) PLL and uses an All Pass Filter (APF) to generate the quadrature component from the single phase input voltage. In order to filter the harmonic content, a Moving Average Filter (MAF) is used, and performance is improved by designing a lead compensator and also a feed-forward compensator. The simulation results are compared to show the improved performance with feed-forward. In addition, the frequency dependency of MAF is dealt with by a proposed method for adaption to the frequency. This method changes the window size based on the frequency on a sample-by-sample basis. By using this method, the speed of resizing can be reduced in order to decrease the output ripples caused by window size variations.
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|Item Type:||Conference Paper|
|Keywords:||All Pass Filter (APF), feed-forward compensator, frequency adaptive averaging window, lead compensator, Moving Average Filter (MAF), Synchronous Reference Frame Phase-Locked Loop (SRF-PLL)|
|Subjects:||Australian and New Zealand Standard Research Classification > ENGINEERING (090000) > ELECTRICAL AND ELECTRONIC ENGINEERING (090600)|
|Divisions:||Current > Schools > School of Electrical Engineering & Computer Science
Current > QUT Faculties and Divisions > Science & Engineering Faculty
|Copyright Owner:||Copyright 2014 The Author(s)|
|Deposited On:||26 Aug 2014 22:53|
|Last Modified:||08 May 2015 14:29|
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